Power Efficient Implementation of ECC Using LCSLA Based Dual Field Vedic Multiplier

Abstract

The Elliptic Curve Cryptographic (ECC) technique is employed for security standards such as Security Key Management (SKM), digital signature, data authentication and so on. The ECC technique is capable of sequential and parallel mode processes through a unified design. It is used for both equally binary fields and prime fields of cryptosystems. The DMM structure has been developed using CSA. This adder requires a greater amount of Full Adder circuits, which occupy more area. To overcome this problem, this paper discusses four different methods, such as DMM-Optimized Carry Look Ahead Adder, DMM-Optimized Carry Bypass Adder, DMM-Look up Table Carry Select Adder, and Dual Field Vedic Multiplier – LCSLA, which is used to increase the performance of the ECC. The parameters like power utilization, time delay information, and hardware area overhead are analyzed and compared with existing methods. Among those four methods, the DVM-LCSLA method gave better results in FPGA and ASIC performances.